To get a better idea of how the quantization process is brought about, we will now take a look at a diagram which highlights its main stages. Theoretically every quantization can be traced back to the following diagram:
Every time the clock [27 ] triggers, the counter is increased by one unit and the integrator generates a voltage that corresponds to the binary number generated by the counter. The voltage issuing from the integrator is then compared with the voltage of the input signal. If the latter is greater, the counter continues increasing until the two voltages become equal, or rather, until they differ by a sufficiently small fixed value. At that point the counter's binary number will match the input voltage, which means that our sample is ready to be stored. The subsequent sample's circuit is then reseted to zero, and the process starts over again.
[27 ] The clock is a circuit that supplies constant timing.